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C-DAC Selects Valtrix STING For Design Verification Of RISC-V Based Microprocessors

C-DAC Selects Valtrix STING For Design Verification Of RISC-V Based Microprocessors

- Valtrix and C-DAC to collaborate to ensure comprehensive verification of highperformance RISC-V microprocessors.

BANGALORE, INDIA, Dec. 8, 2020 /PRNewswire/ -- Valtrix Systems, provider of design verification products for building functionally correct CPU and system-on-chip implementations, announced today that Centre for Development of Advanced Computing (C-DAC), a premier R&D organization of Government of India, has licensed STING for the verification of RISC-V based designs being developed for use in a number of strategic sectors. C-DAC is collaborating with Valtrix to ensure comprehensive verification of the RISC-V processors and SoC designs developed as part of this project.

STING's design verification capabilities are perfectly suited to verify these microprocessors, given its ability to generate portable self-checking stimulus across multiple device-under-test environments and to allow users to exercise architectural and micro-architectural features using its test stimulus programming framework.

"We are very excited that C-DAC has selected STING for design verification of the indigenously developed microprocessors," said Shubhodeep Roy Choudhury, CEO of Valtrix. "As more complex RISC-V designs evolve, a highly complete design verification approach becomes imperative to the success of the project. Valtrix's technology has been designed to embody the best test stimulus generation methodologies and is well suited for verification of a wide variety of processors ranging from IoT/embedded to server platforms."

For more information on Valtrix's design verification technology and products, visit

About Valtrix's STING Design Verification Tool

STING, the flagship product of Valtrix, is a design verification platform for RISC-V based implementations. It can be configured to generate portable bare-metal programs containing selfchecking architecturally-correct test stimulus, which can then be enabled on simulation, FPGA prototypes, emulation or silicon. STING also provides a RISC-V architecture verification suite to provide users an easy ramp into verification readiness.

Connect with Valtrix at:

Twitter: @ValtrixSystems

Media Contact:
Shubhodeep Roy Choudhury

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